Suchi K gowda

Aspiring Design Verification Engineer with a solid foundation in SystemVerilog, UVM, and ASIC verification methodologies. Eager to contribute to the development of reliable and high-performance semiconductor products by leveraging strong analytical, debugging, and problem-solving skills. Seeking an opportunity to grow professionally while delivering quality-driven verification solutions in a dynamic VLSI environment.

Reliability Engineer - CEMILAC, DRDO (on payroll: iMicro Systems) - Bengaluru

(2025-06)

• Performed FMEA, FMECA, FTA, and reliability analysis for aerospace systems.
• Supported airworthiness certification and safety documentation.
• Worked with MIL Standards, ARP4761, and ARP4754A.
• Used Isograph for reliability and safety analysis.

Design Verification Trainee - ChipEdge Technologies Pvt. Ltd. - Bengaluru

(2025-02 - 2025-06)

• Trained in Verilog, SystemVerilog, UVM methodology, and ASIC verification flow.
• Worked with Synopsys VCS and DVE for simulation, debugging, and waveform analysis.
• Developed knowledge of verification concepts including assertions, functional coverage, and constrained-random testing.

Bachelor of Engineering - Electronics and Communication Engineering - Government Engineering College Ramanagara (2021 - 2025)

Pre-University Examinations - Class 12 / Second PU - PES PU College, Mandya (2019 - 2021)

KSEEB Examinations - Class 10 / SSLC - Sri Venkateshwara Vidyanikethana, Moodaladoddi (2018 - 2019)