Sumbul Fatima

VLSI undergraduate skilled in RTL to Bitstream SoC design, ASIC Design Flow implementation seeking a RTL design intern role to contibute to RTL development, high performance processor work

Volunteer, Tech-ECE Domain at IEEE Student Branch, JIIT (2024-01 – Present)

• Assisted in organizing technical workshops, mentoring 50+ first-years students on verilog and digital logic, facilitating hands-on learning like Arithmetic Logical Unit.
• Orchestrated logistics 5+ campus events, increasing student participation by 20 percent

Bachelor of Technology in EE(VLSI) – Jaypee Institute of Information Technology (2027-12)