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Vidhya Pandi

Vidhya Pandi

Embedded Design Engineer

Talent
ChennaiMember since July 16, 2026
DRC/ERCArduinoPuttyC++Embedded CArduino FrameworkArduino IDEUARTSPII²CTCP/IPFirebase Realtime DatabaseMongoDBOTAIPC-7351DFMAFMEAMTBFHOQOscilloscopeLogic AnalyzerICTGitSolidWorksPython
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DRC/ERCArduinoPuttyC++Embedded C

About

Embedded Design Engineer with experience in PCB design, embedded firmware development, and IoT-based product development. Skilled in designing hardware and developing firmware for embedded systems with knowledge of PCB design standards, embedded C/C++, hardware debugging, and system integration. Experienced in product development from schematic design and PCB layout to testing, deployment, and field support for reliable embedded solutions.

Experience

Embedded Engineer at RE4billion.Ai Pvt Ltd (2024-06 – Present)

  • Designed IPCT-2221/IPC-7351-compliant 2-layer and multi-layer PCBs for a 48V Smart Remote Monitoring System (RMS), incorporating AC/DC measurement front-ends, transient voltage suppression (TVS) diodes, bulk decoupling networks, reverse polarity protection (RPP) via P-channel MOSFETs, over-voltage clamping, Class B ESD protection, and RC/LC signal filtering networks to ensure EMI/EMC robustness and field-reliable operation.
  • Engineered ESP32 WROOM 32 application-specific hardware circuitry adhering to Espressif Systems hardware design guidelines, including RF keep-out zones, decoupling topology per datasheet recommendations, and impedance-controlled trace routing for high-speed signal integrity.
  • Executed full Design for Manufacturability and Assembly (DFMA) reviews, including DRC/ERC verification in EDA tools, courtyard clearance checks, via-in-pad analysis, and thermal relief optimization for reflow soldering compatibility.
  • Compiled IPC-compliant Bills of Materials (BOMs) with parametric component validation, approved vendor lists (AVLs), and functional alternates; maintained revision-controlled engineering logs and product release packages (PRPs) to support PCBA manufacturing and regulatory compliance workflows.
  • Conducted Mean Time Between Failures (MTBF) analysis at component and system level using MIL-HDBK-217F and IEC 62380 reliability prediction methodologies to quantify operational lifespan and field serviceability metrics.
  • Led component- and system-level Design Risk Assessments using Quality Function Deployment (QFD) / House of Quality (HoQ) matrix and Design Failure Mode and Effects Analysis (D-FMEA), translating Voice of Customer (VoC) requirements into measurable engineering specifications with associated Risk Priority Numbers (RPNs) and mitigation action plans.
  • Managed full product lifecycle from schematic capture and PCB layout through PCBA bring-up, in-circuit testing (ICT), functional validation, embedded firmware integration, and mechanical enclosure fitment verification.
  • Produced SolidWorks-based 3D mechanical enclosure models, technical product datasheets, and marketing collateral for RMS product line; delivered client-facing technical demonstrations and engineering pitches for commercial accounts and government innovation grant evaluations.
  • Contributed hardware design support to an AI-based precision smart irrigation system, interfacing sensor front-end circuitry with edge inference pipelines.
  • Developed ESP32-based embedded firmware in C/C++ using Arduino Framework (Arduino IDE & PlatformIO /VS Code) enabling TLS-secured Wi-Fi (IEEE 802.11 b/g/n, 4G/broadband) and GSM (IoT/M2M SIM, 2G/3G) communication between field-deployed RMS devices and Firebase Realtime Database, with reconnection logic for unstable rural network environments.
  • Designed multi-channel sensor data acquisition and processing modules using 3 ADS1115 16-bit I2C ADCs (multi-address configuration: 0x48, 0x49, 0x4A) for expanded channel capacity, incorporating TRMS computation algorithms, factory calibration routines, and adaptive digital filtering for accurate voltage and current measurement.
  • Architected a secure, layered data communication framework incorporating domain-based URL whitelisting, token-based authentication control, exponential backoff retry management, and persistent store-and-forward buffer queuing to ensure zero-data-loss, uninterrupted Firebase cloud synchronization under intermittent WAN connectivity.
  • Implemented SPI-interfaced SD card local data logging and buffering using FatFS file system with structured write operations to prevent telemetry data loss during network outages, with event-driven background synchronization daemon for automatic cloud upload upon connectivity restoration.
  • Designed modular, scalable firmware architecture with separation of concerns across abstraction layers, supporting HTTP-based OTA firmware updates with MongoDB-backed version manifest and remote version control, enabling efficient fleet-wide device maintenance without physical intervention.
  • Implemented fault-tolerant communication stack with real-time TCP/IP connection health monitoring, exponential retry policies, FIFO-queued data transmission buffers, and hardware Watchdog Timer (WDT) with software panic-handler–triggered auto-recovery to eliminate unrecoverable field lockups and ensure continuous remote monitoring uptime.
  • Applied multi-stage signal conditioning (adaptive IIR filtering, sliding-window averaging, noise-floor suppression) to improve ADC SNR in high-EMI environments and validated GSM AT-command behavior using PuTTY/Windows CMD.

Embedded Systems Intern at RE4billion.Ai Pvt Ltd (2024-03 – 2024-05)

  • Supported embedded hardware design and peripheral bring-up activities, including GPIO, SPI, I2C, UART interface verification and microcontroller register-level configuration.
  • Assisted in PCB functional validation, bare-board continuity testing, and in-circuit debug of IoT-based monitoring prototypes using oscilloscopes, logic analyzers, and multimeters.
  • Applied Embedded C/C++ for firmware unit testing and HAL-level hardware abstraction troubleshooting.
  • Contributed to structured BOM preparation, test report documentation, and defect logging in support of systematic hardware debug and Design iteration cycles.

Embedded Systems Intern at Enovate Skills (2023-02-06 – 2023-02-20)

  • Completed a structured curriculum covering microcontroller architecture (Harvard/Von Neumann), peripheral interfacing protocols (GPIO, ADC, PWM, UART), and real-time embedded system concepts.
  • Practiced register-level C and object-oriented C++ programming for MCU-based applications through guided lab exercises and hardware simulation environments.

Education

B.E. in Electronics and Communication Engineering – Kongunadu College of Engineering and Technology (2024-05)

Skills

Embedded Design Engineer

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