Chip Verification - 7+ job offers

*Role Description** In this role, you will help create chip libraries, IP, and complete designs. You will utilize your expertise in DV to ensure quality and functionality throughout our product stack, working alongside a cross-functional team of world-class engineers and researchers. We’re looking f

At Harlow's Casino Resort and Spa, the vibrant culture of Greenville meets the thrill of gaming, the comfort of luxury accommodations, and the indulgence of a full-service spa. As an employee, you get the chance to be an ambassador of southern hospitality, crafting moments of joy for guests while th

Job DetailsJob Location: THE BLACK HAWK CASINO - SHAWNEE, OK 74804Education Level: High SchoolJob Shift: DaySUMMARY: Responsible for the currency drop and transport to the count room ensuring compliance with laws, rules and regulations of the Gaming Commission, as well as policies, procedures and co

Rapidus Corporation US

Role Overview: You will develop and verify the "Reference Flow" provided to customers, focusing on sign-off and verification (STA, DRC/LVS, IRDrop/EM). We are looking for experts who can ensure the reliability of 2nm GAA designs. Key Responsibilities: ・Develop and validate verification steps of the

Sivaltech

*Job Title:** Design Verification Engineer *Location:** CA *Experience Level:** 10+ Years *Job Description:** We are seeking a skilled *Design Verification Engineer** with strong expertise in *System Verilog (SV)** and *UVM** methodologies to join our team. The ideal candidate will have hands-on exp

SBT

SBT is the exclusive executive recruiting firm for this confidential position.* **Overview*** The Physical Verification Lead owns full-chip physical signoff for advanced-node designs at leading-edge foundries. This role is responsible for driving DRC, LVS, and manufacturing signoff to successful tap

Sivaltech

Job Title: Design Verification Engineer Location: CA Experience Level: 10+ Years Job Description: We are seeking a skilled Design Verification Engineer with strong expertise in System Verilog (SV) and UVM methodologies to join our team. The ideal candidate will have hands-on experience in developing