29 job opportunities for coherent interconnects in United States updated today
job offers found
· Page 1 / 2We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL codin
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL codin
Micron TechnologyOur vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever
Nvidia CorporationWe are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on‑chip and off‑chip interconnect network, MP coherency and last‑level and system caches, focusing on tasks such as micro‑architectural definition, RTL codin
Nvidia CorporationA leading technology company in Santa Clara is seeking a Senior Logic Design Engineer to design CPU on-chip and off-chip interconnect networks. The role involves owning and delivering a chip unit, writing performant RTL, and collaborating closely with verification teams. Candidates should have a Mas
NVIDIAA leading technology company in Austin is seeking a Senior ASIC Physical Design Engineer to join their Cache Coherent Interconnects team. This role involves physical design responsibilities, ensuring performance, timing, and area goals are met, and defining architectures for next-generation intercon
NVIDIASenior ASIC Physical Design Engineer, Cache Coherent Interconnects page is loaded## Senior ASIC Physical Design Engineer, Cache Coherent Interconnectslocations: US, CA, Santa Clara: US, TX, Austin: US, TX, Remote: US, OR, Hillsboro: US, CA, Remotetime type: Full timeposted on: Posted Yesterdayjob re
NVIDIAA leading technology company in Austin, Texas is seeking a Physical Design Engineer to join their innovative CPU Cache Coherent Interconnects Design Team. This role involves collaboration with logic design teams and focuses on achieving performance and power goals. A Master's Degree and 5+ years in
NVIDIAWe are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL codin
NVIDIAA leading technology firm in Oregon seeks a Senior Logic Design Engineer to design on-chip and off-chip interconnect networks. Responsibilities include owning chip units, writing high performance RTL, collaborating with verification teams, and assisting with timing closure. Required qualifications i
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design team on micro-architec
As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design team on micro-architec
Nvidia CorporationA leading technology company in Santa Clara is seeking a Senior Logic Design Engineer to design CPU on-chip and off-chip interconnect networks. The role involves owning and delivering a chip unit, writing performant RTL, and collaborating closely with verification teams. Candidates should have a Mas
NVIDIAAs a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design team on micro-architec
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL codin
NVIDIA CorporationA leading technology company in Austin is seeking a Senior ASIC Physical Design Engineer to join their Cache Coherent Interconnects team. This role involves physical design responsibilities, ensuring performance, timing, and area goals are met, and defining architectures for next-generation intercon
NVIDIAA leading technology company in California is seeking an experienced engineer to join their CPU Cache Coherent Interconnects Design Team. You will work on the physical design of CPU interconnect networks and caches, engaging closely with the logic design team. A Master's degree and 5+ years of high-
NVIDIAA leading technology company in California is seeking an experienced engineer to join their CPU Cache Coherent Interconnects Design Team. You will work on the physical design of CPU interconnect networks and caches, engaging closely with the logic design team. A Master's degree and 5+ years of high-
NVIDIA CorporationA leading technology company in Austin is seeking a Senior ASIC Physical Design Engineer to join their Cache Coherent Interconnects team. This role involves physical design responsibilities, ensuring performance, timing, and area goals are met, and defining architectures for next-generation intercon
NVIDIA CorporationSenior ASIC Physical Design Engineer, Cache Coherent Interconnects page is loaded## Senior ASIC Physical Design Engineer, Cache Coherent Interconnectslocations: US, CA, Santa Clara: US, TX, Austin: US, TX, Remote: US, OR, Hillsboro: US, CA, Remotetime type: Full timeposted on: Posted Yesterdayjob re
$40,000 – $63,000per year
Estimation confidence: Low
Estimate based on market data. Actual salaries may vary depending on experience, company, and location.
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