Cpu jobs in San Francisco

About the Team The Stargate team is responsible for building the physical infrastructure that powers large-scale AI systems. We design and deliver next-generation data centers optimized for dense compute clusters, advanced networking, and rapidly evolving hardware platforms. This work sits at the in

About the Team OpenAI’s Infrastructure organization builds the systems that power frontier AI workloads at global scale. As compute demand accelerates, our ability to rapidly convert infrastructure investments into usable production capacity has become mission critical. The CPU / Storage / PoP / WAN

We are so glad you are interested in joining Sutter Health! Organization: ABSMC-Summit Campus Position Overview: Applying the principles of the nursing process and working within the policies/procedures of the Patient Care Services Department and the Medical Center, the staff nurse is a registered n

Apple's Silicon Engineering Group (SEG) is hiring experienced engineers for the CPU Implementation leadership team. As a CPU Implementation Lead Engineer, you will own or participate in the following: • CPU IP delivery • Work with multi-functional engineering teams to implement and validate physical

In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly. As a CPU Verification Engineer owning the verification of a certain area of functionality in a CP

In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure. As the CPU Design Timing Engineer, you will be responsible for the timing clo

As a CPU CDC/STA Engineer, you will play a major role analyzing the design and driving fixes as well as developing, maintaining and improving our Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA) constraints and methodology for our CPUs across multiple d

Apple's Silicon Engineering Group (SEG) is hiring skilled engineers for CPU. As a CPU Clock Implementation Engineer, you will be driving the planning, design, implementation, and analysis of clock. As a CPU Clock Implementation Engineer, you will participate in the following: • Work on clock plannin

In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure. As the CPU Design Timing Engineer, you will be responsible for the timing clo

In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly. As a CPU Verification Engineer owning the verification of a certain area of functionality in a CP

As a CPU CDC/STA Engineer, you will play a major role analyzing the design and driving fixes as well as developing, maintaining and improving our Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA) constraints and methodology for our CPUs across multiple d

In this highly visible role, you will be at the center of a chip design effort collaborating with all subject areas, with a critical impact on getting functional products to millions of customers quickly. You will be responsible for silicon performance verification, correlation, characterization and

The CPU Platform Architecture team is responsible for pushing the boundaries of both single-threaded and multi-threaded CPU performance, to enhance the user experience of many Apple products. The team is composed of experts with deep experience in microarchitecture, ISA definition, performance model

Apple's Silicon Engineering Group (SEG) is looking for a hardworking engineer for our CPU Gate Level Synthesis role to assess and optimize design quality. In this role, the candidate would be a part of Apple's industry-leading CPU design team, working in a multi-functional role to ensure that our CP

In this highly visible role, you will be at the center of a chip design effort collaborating with all subject areas, with a critical impact on getting functional products to millions of customers quickly. You will be responsible for silicon performance verification, correlation, characterization and

In this highly visible role, you will be at the center of a chip design effort collaborating with all subject areas, with a critical impact on getting functional products to millions of customers quickly. You will be responsible for silicon performance verification, correlation, characterization and

As a CPU CDC/RDC/STA Engineer, you will play a major role analyzing the design and driving fixes as well as developing, maintaining and improving our Lint, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC) and Static Timing Analysis (STA) constraints and methodology for our CPUs across multip

As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level design of power-grid and analysis of high performance compute blocks in the EMIR/SIGEM/Reliability space. • Drive block and top-level EMIR/electrical verification closure • Work on power grid design, construc

As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level design of power-grid and analysis of high performance compute blocks in the EMIR/SIGEM/Reliability space. • Drive block and top-level EMIR/electrical verification closure • Work on power grid design, construc

In this highly visible role, you will be at the center of a chip design effort collaborating with many teams, with a critical impact on getting functional products to millions of customers quickly. We are looking for a strong candidate to join our processor verification team focusing on Power Manage