Guru Kishan
VLSI Analog Layout Engineer
Talent
BengaluruMember since August 18, 2026
Cadence VirtuosoDevice MatchingFloorplanningParasitic MinimizationAnalog Layout DesignDigital Layout DesignTransient analysis
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Cadence VirtuosoDevice MatchingFloorplanningParasitic MinimizationAnalog Layout Design
About
Eager to apply my technical expertise and problem-solving abilities to real-world engineering challenges in the rapidly evolving tech landscape.
Experience
Analog Layout Design Trainee at byMerit (2025-11 – Present)
- Analog Layout Design: Implement advanced layout techniques including device matching, symmetry, common-centroid configurations, parasitic minimization, and custom block Floorplanning, Back Annotation.
- Digital Layout Design: Complete physical layouts for standard cells and digital logic blocks using Cadence Virtuoso tools.
- Physical Verification: Perform full-cycle physical verification and sign-off checks, successfully resolving DRC, LVS, LUP, and EMIR violations to ensure fabrication readiness.
Graduate Apprentice at Central Manufacturing Technology Institute (CMTI) (2024-08 – 2025-09)
- Control System Design: Designed and installed robust control systems for high-precision industrial automation utilizing Siemens TIA Portal and WinCC RT Advanced.
- Machine Automation: Actively contributed to the end-to-end development, logic design, and system integration of a Primary Hardness Standardization Machine.
Education
M.Tech. in VLSI – Indian Institute of Information Technology (IIIT), Sri City (2025-08)
B.E. in Electronics and Communication Engineering – Global Academy of Technology (2020-12 – 2024-06)
Skills
VLSI Analog Layout Engineer
