VLSI Analog Layout Engineer
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Eager to apply my technical expertise and problem-solving abilities to real-world engineering challenges in the rapidly evolving tech landscape.
Analog Layout Design Trainee at byMerit (2025-11 – Present)
Graduate Apprentice at Central Manufacturing Technology Institute (CMTI) (2024-08 – 2025-09)
M.Tech. in VLSI – Indian Institute of Information Technology (IIIT), Sri City (2025-08)
B.E. in Electronics and Communication Engineering – Global Academy of Technology (2020-12 – 2024-06)