Prabakaran Rajendran

I am submitting my resume for the position of Physical Design Engineer. With a Master's degree in engineering VLSI design.

I have successfully completed the physical design of multiple block and chip level designs from netlist to GDSII. Performed detailed routing, timing closure, power analysis, clock tree synthesis, place & route for digital standard cell-based designs.

6+ years of experience on various projects ranging from small to large, and I have a proven track record of success. I am confident that I can be an asset to your team and contribute to the success of your company.

Hands on experience in APR using ICC and Innovus

Experience on PrimeTime, Tempus, StarRC, Calibre and Redhawk will be performed

Develop the physical development flow

Floor Plan, Power Plan, APR, CTS and timing closure of block level and chip level.

ME - VLSI Design

BE - Electronics and Communication Engineering