Santhom Raj

Aspiring Hardware Engineer with a solid foundation in Digital Electronics, Verilog programming and FPGA design. Currently interning as an FPGA Design Engineer at Sion Semiconductors and working as a freelancer RTL design engineer, experienced in RTL design, testbench creation, simulation and debugging using Xilinx Vivado. Hands-on projects include FPGA-based robotics, antenna design using ANSYS HFSS and DSP implementations.

Strong interest in VLSI, RTL verification and hardware optimization, with additional exposure to PLC and industry-relevant tools.

RTL Design Engineer - Independent Recruitment Consultant (Freelancer) - Independent Recruitment Consultant (Freelancer)

(2025-07)

• Designed, developed, and verified FPGA-based digital circuits using Verilog HDL.
• Created RTL designs and simulated functionality to ensure correct logic behavior.
• Debugged designs and implemented modules using Xilinx Vivado while ensuring correct timing and hardware performance.

FPGA Design Engineer - Sion Semiconductors - Sion

(2025-05 - 2025-10)

• Designed and optimized RTL modules for semiconductor applications during internship.
• Collaborated with cross-functional teams to validate design functionality and ensure industry-standard compliance.
• Developed comprehensive testbenches to simulate and debug RTL designs, improving verification efficiency.

RTL DESIGN ENGINEER INTERN - Sion Semiconductors

(2025-05 - 2025-10)

• Designed and optimized RTL modules for semiconductor applications, improving data processing efficiency.
• Collaborated with cross-functional teams to validate design functionality and reduce verification cycles.
• Developed testbenches to simulate and debug RTL designs, contributing to timely project delivery.

B.Tech / B.E. - Electronics and Telecommunication Engineering - Mepco Schlenk Engineering college, Sivakasi (2025)

12th - Tamil Nadu, English (2021)

10th - Tamil Nadu, English (2019)