Process Integration & Yield Technician
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I work as part of a team that supports Intel Corp’s Ronler Acres Research and Development Fab, within Intel’s Yield department. This team enables the Yield learning on Intel’s computer chip products before they are released for mass production. The purpose of our job is to enable Yield learning by preparing samples for defect analysis which helps engineers correct the fabrication process for the various products we deal with in order to reduce defects; ultimately enabling Intel’s profitability by helping to enable products to be mass produced and go to market.
I am part of a team that are at the front-line of investigations into the root-cause of product defects in the most technically challenging job of this type due to the high-end computer chips we are working on being some of the most complex technologies that humans have produced thus far. And of all the technician jobs in the company, this position is one of the hardest. As semiconductor technology advances the job of cutting out ROI’s and preparing them for analysis becomes harder.
In our job creativity, team work, problem-solving skills, and high levels of technical aptitude are necessary to continue pushing the technology forward into production. And despite the growing challenges we face, last year I helped the lab produce more samples than ever before in its history. This means that I helped speed up the Yield learning process, along with my team.
The technical explanation of what we do is we prepare microscopic samples taken from dies or wafers containing a ROI (region of interest) suspected of containing defects at the transistor, metal layer, etc. level for TEM imaging or Nanoprobing. Depending on the sample type, we also inspect metal layers in the ROI area for defects using the SEM. In addition, we convert one sample type into another so that the engineers can get more data off of an already- analyzed sample.
We perform our job by operating a DIB (Dual Ion Beam). The types of samples we produce are XTEMs (cross-sections), PTEMs (planar), and FIB Thins either for TEM samples or Nanoprobing ones (planar samples where metal layers are inspected for defects by the sample prep technician).
I work in the semiconductor industry as a Process Integration and Yield technician. Specifically, I use a SEM/FIB to help with locating defects for Yield learning purposes.
I have a bachelor's degree in "Health Sciences" from the University of Central Florida. The degree is a holistic degree that focuses on human biology and public health concerns.