Ambati Sevya
RTL Design & Verification Engineer (Fresher / Trainee)
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About
I hold a Bachelor of Technology in Electronics and Communication Engineering (2021–2025) from Lendi Institute of Engineering and Technology and am currently advancing my hands-on semiconductor design expertise as an RTL Design Engineer Trainee at VLSIGuru in Bengaluru. With a solid foundation in synthesizable RTL coding, SystemVerilog testbench creation, and digital design debugging, I am eager to contribute immediately to your engineering team.
Experience
RTL Design Engineer Trainee at VLSIGuru (Present)
During my training at VLSIGuru, I have focused on translating digital architecture specifications into clean, synthesizable Verilog and SystemVerilog modules, verifying functional correctness, and analyzing waveforms using industry-standard EDA simulators.
Education
Bachelor of Technology in Electronics and Communication Engineering – Lendi Institute of Engineering and Technology (2021 – 2025)
