Bhagya Panjaje
Physical Design Engineer | ASIC Backend | RTL-to-GDSII
Talent
BengaluruMember since May 3, 2026
RTL-to-GDSIISynthesisSDCFloorplanningPower PlanningPlacementCongestion AnalysisSTASetup/HoldCTSRoutingSynopsys DCFusion CompilerVCSOpenLaneGit/GitHubFSM2FF SynchronizerSeleniumJavaTestNGPostmanOracle SQLJIRA
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RTL-to-GDSIISynthesisSDCFloorplanningPower Planning
About
M.Sc. Electronics graduate with hands-on ASIC Physical Design exposure across 14nm and Sky130 flows. Practical experience in synthesis, SDC constraints, floorplanning, power planning, placement, congestion analysis, and PG connectivity debugging using Synopsys and open-source EDA tools. Working knowledge of STA, setup/hold analysis, CTS, and routing. Seeking entry-level Physical Design, ASIC Implementation, or Place & Route roles.
Experience
Website Tester / QA Engineer at Blue Zone Online Marketing Solutions (2023-08 – 2025-02)
- Performed functional, regression, and integration testing; investigated defects using structured debugging and root-cause analysis.
- Collaborated with development teams using JIRA and Git/GitHub; gained exposure to Selenium, Java, TestNG, Postman, and Oracle SQL.
Education
M.Sc. in Electronics – Mangalore University (2022)
Skills
Physical Design EngineerASIC BackendRTL-to-GDSII
