Harshit Kumar Shakya
FPGA Engineer | RTL Coding | ASIC | Verilog
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About
Recently completed Master of Technology in VLSI and Embedded Systems from Pune's Defence Institute of Advanced Technology. Hands-on experience with FPGA boards like Basys-3 and Artix-7. I am fluent in various tools, including Xilinx Vivado, Synopsys QuantumATK, LTspice, CST, and KiCad.
Key Skills
Programming Languages(Basics): C++, Python
Hardware Description Languages: VHDL, Verilog
Tools: Xilinx Vivado, Cadence Virtuoso, Synopsys QuantumATK, LTspice, CST, KiCad
FPGA Boards Used: Basys-3, Artix-7
Mini Projects (15+): code for Arduino board with connections diagram, all are simulated and tested using TinkerCAD.
Experience
◦ Directed the verification and analysis of complex PCB design data sets, ensuring precise compliance with requirements; reduced manufacturing defects by 22% and elevated product quality by 15%.
◦ Improved system reliability by 40% and minized power consumption by 25% with optimized ICs and microcontrollers, resulting in flawless functioning and great performance for end users.
◦ Enhanced and optimized electrical circuits of the Smart KVM Switch, cutting production expenses by 15% and boosting product reliability and performance, resulting in a 25% increase in customer satisfaction.
Education
Recently completed Master of Technology in VLSI and Embedded Systems from Pune's Defence Institute of Advanced Technology.
