Meet Vaisnani

My self Meet Vaisnani I completed my BE in Electeronic and Communication From Maharaja Sayajirao University of Baroda, also I completed my VLSI Design and Verification Training From Maven silicon Centre of excellence in VLSI Banglore,

Advanced VLSI Design and Verification Training.

*in Design part

I am study about the Digital Electronic , and for programing side hardware description language

(HDL) Verilog,

*and for Verification part

I am study about Hardware Verification Language (HVL) System Verilog ,UVM,STA,FPGA

BE From Maharaja Sayajirao University of Baroda

Dept: Electronic And Coomunication