Rishitha Rao

To deliver the best possible results and create reliable designs by applying my technical knowledge in VLSI Physical Design such as floorplanning, placement and routing, static timing analysis, and physical verification. I believe in the motto that work is worship and I want to progress and evolve by reaching new heights, embrace challenges and pursue more. I will give my efforts to make a meaningful impact in a dynamic and creative environment.

My goal is to contribute to innovation while continuously enhancing my technical and personal abilities.

Physical Design Engineer at Maven Silicon Soft Tech Private Limited (2025-01 – Present)

Advanced Physical Design and Verification Training

Summer Intern at Monk9 Tech Pvt. Ltd. (2023-06 – 2023-07)

ASIC Design Flow Internship

• Gained hands-on experience in ASIC design flow using tools like VSD Flow and OpenLane
• Designed and simulated basic digital building blocks in Verilog
• Created and tested testbenches for verification and simulated using GTKWave

BTech in Electronics Engineering – Birla Vishvakarma Mahavidyalaya Engineering College, GTU (2021-10 – 2025-05)

High School in CBSE Grade 12 – KV ONGC Vadodara (2021-07)

High School in CBSE Grade 10 – Delhi Public School Harni (2019-05)