Anu Mathew

Detail-oriented, hardworking, and result-driven Engineer with proven experience in electrical and computer-aided designs, equipment development, administering verification and validation processes, and successfully managing multiple projects within dynamic, fast paced, multi-site, and multicultural environments. Proficient at implementing numerous electrical protocols, principle and practices, interpreting detailed drawings, and innovating novel products and detailed electrical structures. Adept in designing and developing a wide-range of electrical equipment and products, solving complex problems, assessing risks, and maximizing form, fit, and function through meticulous design model evaluations.

Backed by advanced skills in CAD modeling, data and statistical analysis, and numerous CAD tools and electrical equipment; capable of applying concepts for component design, layout, and assembly. Communicative and personable; able to work in teams and independently, learn new software and systems, and adapt to new environments easily and quickly with absolute professionalism.

Senior Principal Mixed Signal Designer (GTS) - Lockheed Martin - Orlando, FL

(2021-07)

• Architected and designed 4 phase buck converter for various server applications in GF13BCD technology.
• Designed and implemented analog/mixed signal blocks for Physical Unclonable functions (PUF) in FINFET technology. The designs are done both Intel 14 and GF 12 PDK.
• Thorough working experience in end-to end SOC/SOI silicon design, architecture, MCM Flip chip package design as well as active Interposer design techniques for backend and front end protection.
• Participated in product definition and planning of sensory modules (voltage/clock/temperature) for cyber applications. Provided technical guidelines to team members on circuit design, simulation and verifications (AMS).

Senior Principal Mixed Signal Designer - Northrop Grumman - Woodland Hills, CA (Chandler, AZ, remote)

(2020-04 - 2021-07)

• Conducted ASIC design reviews for Gyro Sensors, provided technical guidelines and templates for PDR/MDR/FDR.
• Through understanding and design implementation of Analog front end circuits for MEMS blocks including noise shaped sigma delta converter, Coventor MEMS model generation and analysis.

Analog Consultant - Intrinsix Corp - MA

(2019-09 - 2020-03)

• Designed and implemented analog blocks for high speed data lines (RF)

Senior Analog Designer / Chip Lead - NXP Semiconductor - Chandler, AZ

(2012-06 - 2019-08)

• Designed, implemented, and launched high-speed interface signaling chipsets for Type C applications for top-tier customers.
• Led a cross-functional team of 30+ engineers; conducted quality and feasibility analysis, architectural, layout and design reviews, developing packages and bench/ATE, and oversaw application interface and final product releases with the aim of delivering timely and cost-effective products, including high speed chip sets to customers.
• Consistently resolved product issues, including de-sensing (USB cable interference on mobile applications), with key customer applications.
• Successfully implemented Battery charger design for PMIC used in microcontroller applications. Strong working knowledge experience in Buck/Boost, SEPIC, Cuk and resonant converters.
• Boosted product yield and prevented product loss by implementing zero-defect procedures and practices.

Senior Analog Designer - Freescale Semiconductor - Austin, TX

(2004-06 - 2012-05)

• Designed and implemented Low Jitter Frequency Synthesizers (PLLs) as well as Frequency locked loops (FLLs) for micro controller based automotive and industrial applications.
• Designed low jitter, low power LC –based VCO and relaxation Oscillator for Consumer & Industrial and automotive applications (MCU based) in C90 technologies
• Facilitated the reduction of test cost and the improvement of test coverage and product test efficiencies by proposing and implementing test methodologies (ATE and bench) for 8/32-bit microcontrollers.
• Served as a Lead Designer and developed various analog IPs and test chips; oversaw validation plans and assessed designs from global design centers.
• Successfully recommended and executed analog test methodologies which was later authorized and implemented as a standard test procedure (STP) for next generation products.

IC Design Engineer - ELMOS NA - Detroit, MI

(2002-06 - 2004-05)

• Successfully designed and implemented a high voltage regulator and bandgap circuits for sensor applications and switched capacitor filters (SC) for differential integrated pressure sensors (MEMS) for automotive applications.

Senior RF/Mixed-Signal Designer - IceFyre Semiconductors - Ottawa, Canada

• Designed Transceiver components (e.g. Upconversion Image Rejection mixers, Polyphase Circuits) for WLAN ( IEEE 802.11a ) applications.
• Modeled passive components (inductors, Transformers, Trifilers) in the schematic level.

IC Designer - Nortel Networks - Canada

• Designed and implemented phase locked loop (PLLs) for OC192 applications in CMOS 0.25u/0.13u technologies. The frequency ranges from 622 MHz to 5 GHz

Master of Business Administration - MBA - Arizona State University (2019)

Master of Science - Electrical Engineering - University of Windsor

Bachelor of Engineering - Computer Science and Engineering - University of Marathwada