Rtl Design professionals in India

FPGA/RTL Engineer

Chennai

VerilogC++ (HLS)C+++30

FPGA/RTL Engineer

Kishore S

Chennai, Chennai district

RTL & FPGA Design |SoC, DFT & ATPG |NoC Enthusiast

RTL & FPGA Design |SoC, DFT & ATPG |NoC Enthusiast

Sastry Puranapanda

Principal Engineer

RTL Design and Design Verification

Chintakrindi Baby Latha

system design using industry-standard VLSI tools • Learned RTL design, simulation, and verification methodologies

Full-stack Devloper

Mangalagiri

JavaPythonC+27

Prajna Cp

Bengaluru, Bengaluru Urban₹500/hour

Vlsi engineer

Hire their servicespcb designembedded systems engineerembedded software+2

I design printed circuit boards (PCBs), which are the backbone of all electronic devices.

Tuuba Shabnam Mohd Mukarram

Bengaluru, Bengaluru Urban₹3,000/hour

Digital Design Engineer

Hire their servicesdigital design engineerasic developmentsoC development

Digital Design Engineer

Mayank Rudakiya

ASIC Design Engineer

ASIC Design Engineer

Nihar Buxy

Fresher Mtech(EC)

I have just now completed my MTECH in VLSI Design & Embedded systems, i have interest in RTL design ,design verification

Murali Y

FPGA Expert

I am an FPGA Expert, with good knowledge in RTL Design, Image Processing, Communication Protocols, Xilinx FPGAs and Altera

Arun Kumar Madupathi

DV Trainee at Vlsi first Hyderabad | VLSI FIRST

I am Arun Kumar Madupathi, a Design & Verification trainee at VLSI FIRST, Hyderabad, with hands-on skills in RTL design

Faizan Damudi

Physical Design Engineer

Physical Design Engineer

Siddhant Pandey

Experienced in Verilog, SystemVerilog, RTL design, FPGA development and Embedded IoT systems.

Electronics Engineering Student at VIT, Vellore

Indore, Indore district

Naveen C

FPGA engineer/ design verification

FPGA engineer/ design verification

Mekala Anjikumar

Fgpa design and verification engineer

Fgpa design and verification engineer

Sathvik R

Embedded Engineer

I have worked on RTL design using Verilog/SystemVerilog, FPGA-based implementations, and complete ASIC flow projects using

Konda Shivateja

Physical Design Engineer

Physical Design Engineer

Pankaj Kumar

My academic work includes circuit design, RTL/digital systems, FFT implementations, and analog simulation using Eldo and

ECE / Data / Embedded / ML / Radar

New Delhi, New Delhi

Anirudh Rajesh

ECE Graduate | VLSI | Analog Layout

I am an Electronics and Communication Engineering graduate with a strong interest in VLSI Design, Analog Layout, and Digital

Nirvan Mishra

tools, with experience in CMOS gate sizing, power-delay optimization, and verification of RTL designs.

Embedded Software Engineer

Indore, Indore district

Janarthanan M

I am currently expanding my skills in digital design, RTL coding, and verification.

Mechatronics | VLSI Learner

Salem, Salem district

Anees Ahamed

Chennai, Chennai district$15/hour

Senior Android Developer

Hire their serviceskotlinmobile app developmentjava+2

12.Proficient in developing RTL (Right-to-Left) script apps like Arabic.

Top locations

Bengaluru, Bengaluru urban10 Hyderabad7 Chennai, Chennai district2 Indore, Indore district2 Chennai1 Lucknow1 Mangalagiri1 Mumbai, Maharashtra1 New delhi1 Noida, Gautam buddha nagar1 Salem, Salem district1 Tiruchirappalli1

Industries

Engineering13 Technology & Media8 Entertainment & Recreation1 Education1 Human Resources1

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